Firmware 9.9 Specs
Summary
Changes, Updates and New Features
Important! Need to create a single modular Firmware that can work with all old (v5) devices, current boards (v7, v8) and future devices (Idrive X2).
Boot loader and Kernel
Starting with v7 we will use a new boot loader version. The new boot loader can be installed at old v5 boards in the RMA process.
The new boot loader offers new features like: loading kernel and file system from SD card, etc.
Also starting with v7 we have a new Kernel 2.6.24 that is same Kernel version with some modules and configuration for GPRS.
Code Improvements
Single Config File
Needs to be an XML file that contain all info from firmware version to IP, SSID and more.
XML config file
<Idrive> <Device> <SN>1111222233334444</SN> <MainBoardVersion>7.1</MainBoardVersion> <BootloaderVersion>2</BootloaderVersion> <KernelVersion>2.6.24</KernelVersion> <FirmwareVersion>9.9</FirmwareVersion> <SleepMode>0</SleepMode> </Device> <Network> <SSID>bwifi</SSID> <SSID1>bwifi1<SSID1> <SSID2>bwifi2<SSID2> <IPAaddress>192.168.244.244</IPAddress> <Netmask>255.255.0.0</Netmask> <Port>4660</Port> <ServerIPAddress>192.168.0.10</ServerIPAddress> <DebugIPAddress>192.168.244.244</DebugIPAddress> <DebugNetmask>255.255.0.0</DebugNetmask> <DebugPort>9090</DebugPort> <DebugServerIPAddress>192.168.0.10</DebugServerIPAddress> </Network> <Event> <ShockLength>15</ShockLength> <DoorLength>15</DoorLength> <PanicLength>15</PanicLength> <WPanicLength>15</WPanicLength> <AlarmLength>15</AlarmLength> <ShutdownLength>15</ShutdownLength> <StartLength>15</StartLength> <Gforce> <CTRL_REG1> <a>0x20</a><d>0x85</d><c>0x00</c> </CTRL_REG1> <CTRL_REG2> <a>0x20</a><d>0x85</d><c>0x00</c> </CTRL_REG2> <CTRL_REG3> <a>0x20</a><d>0x85</d><c>0x00</c> </CTRL_REG3> <FF_WU_THS_L> <a>0x20</a><d>0x85</d><c>0x00</c> </FF_WU_THS_L> <FF_WU_THS_H> <a>0x20</a><d>0x85</d><c>0x00</c> </FF_WU_THS_H> <FF_WU_DURATION> <a>0x20</a><d>0x85</d><c>0x00</c> </FF_WU_DURATION> <HP_FILTER_RESET> <a>0x20</a><d>0x85</d><c>0x00</c> </HP_FILTER_RESET> <FF_WU_CFG> <a>0x20</a><d>0x85</d><c>0x00</c> </FF_WU_CFG> <FF_WU_ACK> <a>0x20</a><d>0x85</d><c>0x00</c> </FF_WU_ACK> </Gforce> <SelfTriggered> <Active>1</Active> <Periodic>1</Periodic> <Random>0</Random> <MinInterval>0</MinInterval> <MaxInterval>0</MaxInterval> </SelfTriggered> </Event> </Idrive>
7/8 stable frames
This firmware version needs to have some 7/8 frame stability like Firmware 9.6. 50 ms delay on power images sensors on will force them to work asynchronous.
Set lower values for SDRAM
According to some tests made by Aurel... Require register set. This will be set by PORTC driver using ioremap.
Sleep Mode
On 9.6 firmware we have 3 modes: Test, Event, Transfer.
The Sleep Mode will be optional by checking a variable in the Config file.
The device will enter the Sleep Mode after Transfer Mode.
Any trigger will wake-up the device and will enter in event mode.
Sleep Mode Initialization
1. Stop the IR Led power (shut the IR leds off)
2. Stop the buffering (video, audio, GPS, etc)
3. Stop both cameras
4. Stop the GPS logger
Sleep Mode Functionality
1. Trigger Events - the device will wake up and start recording from that specific moment = Wake Up Event (24 seconds)
2. Timer - the device will remain in the Sleep Mode 72 hours (this value can be set from Config file), after Sleep Mode and if no IGN ON the device will shut down.
3. If IGN ON the device will enter in Event Mode (without restart)
4. Optional! In Sleep Mode the device can go in Transfer Mode ever hour or so (adjustable from Config file)
Sleep Mode Tests
1. Need to establish the exact current in Sleep Mode.
2. Need to see how fast the Event Mode can be start
3. Need to see how many seconds from the Wake Up Trigger will need to start recording.
New Features
Longer events
Events longer then 30 seconds will take only 15 seconds from video buffer, rest will be real-time video...
Random Events
G-Force buffering
New thread/class should be use to manage the buffers.
** Tests notes ** 100kHz, default bus freq permits acquisition of ~8 values/sec. Require to set I2C bus at 400kHz - will increase number of reads/sec up to 25. On verson 5 boards using 400kHz freq creates more noise on image whitch will increase event size by 30%.
GPRS
GPRS - Real Time GPS coordonates and Events data
Will be used http standard requests. Server side Apache/PHP/MySQL. GPS string, ignition and event will be send as parammeters on URL under http request.
GPRS - Logs
GPRS - GSM triggered events (from Idrive Global Center)
Will be used http standard requests. Server side Apache/PHP/MySQL. Event will be triggerd on "SEND PERIOD" since firmware initiate requests. HTTP respond should be parse to get the event request.
Sleep Mode
- shutdown wifi module;
Device consumption in sleep mode 300mA;
Serial Port Features
Require RTS/CTS disabled for serial 1 and set to RX[2], TX[2] - bit [11, 12, 13, 14] to 1010 (0xA) for register:
Serial - Serial triggered event from external devices
Serial - Real Time Event Data
Serial - Real Time GPS coordonates and Events data
Serial - Emergencies Vehicles Logs
Serial - Driver ID
Events - RT Backup to External USB Device
External USB Devices Test
Test files RW mode using USB HDD
OmniVision 2Mpx image sensor resolution reduction
Current settings mode 2
Bank 0 select - 0xFF = 0x00
0x2C = 0xFF , data -> output
0x2E = 0xDF , clock, vsync, href, pclk, y8, y9 -> output
0xE0 = 0x14 , RESET -> DVP, JPG
0xE1 = 0x77, should be reserved( E1 - E8)
0xE5 = 0x1F, should be reserved( E1 - E8)
0xD7 = 0x03, should be reserved( D4 - D9)
0xDA = 0x10, JPEG output, DVP output YUV 422, HREF is same as sensor, High byte first
0xDD = 0xFF, enable pclk, enable vsync, ...
0xD3 = 0x04, pixel clk 72/4
0x41 = 0x20, enable jpg header output
0x44 = 0x0C, image qlty 12
Bank 1 select 0xFF = 0x01
0x15 = polarity href, vsynk, ...
Default settings
Bank 1
0x3C = 0x32 should be reserved (0-6)
0x11 = 0x00, clock rate control
0x09 = 0x02, 2 x capabilty output drive select
0x03 = 0x0F, UXGA
0x04 = 0x28,
0x13 = 0xE5, exposure cont -> Auto, AGC -> Auto, Banding filter selection -> On
0x14 = 0x48, AGC gain ceiling 8x,
0x2C = 0x0C, reserved
0x33 = 0x78, reserved
0x3E = 0x00, externel clock I2C
0x43 = 0x11, reserved
0x16 = 0x10, reserved
0x39 = 0x02, reserved
0x35 = 0x88, reserved
0x22 = 0x0A, Analog color control, 1.5 gain
0x37 = 0x40, reserved
0x23 = 0x00, reserved
0x34 = 0xA0, reserved
0x36 = 0x1A, reserved,
0x06 = 0x02 reserved
0x07 = 0xC0 reserved
0x0D = 0xB7 reserved
0x0E = 0x01 reserved,
0x4C = 0x00 reserved
0x4A = 0x81, v lines for color bar, black sun cancel
0x21 = 0x99, black sun control enable, level 9
0x24 = 0x3A, luminance high range AEC/AGC 58
0x25 = 0x32, luminance Low range AEC/AGC 50
0x26 = 0x82, fast mode step, high 8, low 2
0x5C = 0x00,
0x63 = 0x00 color bars test
0x5D = 0x55, 0x5E = 0x7D, 0x5F = 0x7D, 0x60 = 0x55 , zone avrg weight
0x61 = 0x70, reserved
0x62 = 0x80 reserved
0x7C = 0x05, reserved
0x20 = 0x80, reserved
0x28 = 0x30 reserved,
0x6C = 0x00, reserved
0x6D = 0x80, reserved
0x6E = 0x00, reserved
0x70 = 0x02, BLC control
0x71 = 0x96, reserved
0x73 = 0xE1, reserved
0x3D = 0x34, PLL clock devider
0x5A = 0x57, 50 Hz AEC, 60 Hz AEC
0x4F = 0xBB, 50 Hz banding,
0x50 = 0x9C 60 Hz bandng,