Difference between revisions of "Firmware 10.5 Notes"
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=== MMA8451 Data Acquisition using FIFO Buffer === | === MMA8451 Data Acquisition using FIFO Buffer === | ||
| − | 200 ODR and I2C BUS at 400hz | + | ==== 200 ODR ==== |
| + | |||
| + | 200 / 32 = 6.25 times in 1 sec | ||
| + | |||
| + | 200 ODR and I2C BUS at 400hz | ||
| − | time for 32 values | sleep time | wake time | + | time for 32 values | sleep time | wake time | total wake time / sec | |
| − | 160 ms 154.5 ms 5.5 ms | + | 160 ms 154.5 ms 5.5 ms 34.4 ms |
| + | |||
| + | 200 ODR and I2C BUS at 100hz | ||
| + | |||
| + | time for 32 values | sleep time | wake time | total wake time / sec | | ||
| + | 160 ms 138 ms 22 ms 137.5 ms | ||
Latest revision as of 09:25, 5 June 2013
MMA8451 Data Acquisition using FIFO Buffer
200 ODR
200 / 32 = 6.25 times in 1 sec
200 ODR and I2C BUS at 400hz
time for 32 values | sleep time | wake time | total wake time / sec |
160 ms 154.5 ms 5.5 ms 34.4 ms
200 ODR and I2C BUS at 100hz
time for 32 values | sleep time | wake time | total wake time / sec |
160 ms 138 ms 22 ms 137.5 ms